1. Field of the Invention
The present invention relates to a highly integrated semiconductor device and a manufacturing method thereof. In particular, the present invention relates to a semiconductor device on which a semiconductor element with integrated circuit (IC chip) is mounted, and a manufacturing method thereof.
2. Description of the Related Art
A portable electric apparatus which is represented by a cellular phone or an electronic date book is required to have various kinds of functions such as E-mail, sound recognition, image loading by a small sized camera, and Internet. Therefore, a semiconductor device (a package) having larger circuit size and larger memory volume is required.
Meanwhile, a portable electric apparatus has become smaller sized, thinner, and lower cost. For this reason, a semiconductor device (package), passive components such as a resistor or the like, a mounted substrate, and the like are required to be small sized and low cost. And a semiconductor device which is miniaturized almost to the size of a chip, namely, a CSP (Chip Size Package) is developed. (Reference 1: JP 9-121002)
Therefore, there is a MCP (Multi Chip Package) in which an integrated circuit (IC chip) integrated by plural semiconductor substrates is mounted on a package to increase the integration of a semiconductor device. (Reference 2: JP 5-90486)
As a MCP, there is one that arranges integrated circuits (IC chips) laterally formed of several semiconductor substrates to increase the integration. Since the plural IC chips are arranged laterally, the area of the package becomes large, and thus, reduction in the size of a mounted substrate is prevented.
A semiconductor device (a package) disclosed in Reference 2 is formed of plural lamination of integrated circuits (IC chip) formed of a silicon wafer (a semiconductor substrate). Since the film thickness of the IC chip is comparatively thick, the lamination thereof causes increased volume of the package even if the area of the package is reduced. As a result, a thin electric apparatus using a package is prevented.
A process (back grinder) for thinly polishing an IC chip formed of a silicon wafer is adopted in order to control the volume of the package in MCP. However, the process is resulted to decline in mechanical strength of a semiconductor element because of leaving the polished mark of approximately 10 nm in the back surface of the silicon wafer. As a result, there is a problem of decline in yield caused by the polishing process of a semiconductor element.
Further, since a silicon wafer is more expensive compared to the cost of a glass substrate, there is a problem that plural lamination of semiconductor elements using the silicon wafer causes high price per one package.